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调整门和连线尺寸以减小串扰的拉格朗日松弛法
张富彬; 何庆延; 彭思龙; ZHANGFu-bin; HOChing-yen; PENGSi-long,
Source Publication计算机工程与科学,
2007
Volume29(5)Issue:5Pages:73-76
Abstract本文给出了一个布线后减小串扰噪声的算法。该算法通过调整逻辑门和互连线的尺寸有效地减小了串扰噪声,在减小噪声的同时约束电路的最大延时,使得在串扰噪声和时序都满足约束的条件下最小化芯片面积。算法保证了改变逻辑门和线网尺寸不会破坏电路的时序约束。实验结果证明,本算法有效地减小了串扰。此算法不需回到布线阶段来优化串扰,减少了设计迭代次数,加快了设计收敛时间。
Keyword门尺寸 / 连线尺寸 / 拉格朗日松弛法 / 减小串扰
Document Type期刊论文
Identifierhttp://ir.ia.ac.cn/handle/173211/12934
Collection智能制造技术与系统研究中心_多维数据分析
Corresponding Author张富彬
Recommended Citation
GB/T 7714
张富彬,何庆延,彭思龙,等. 调整门和连线尺寸以减小串扰的拉格朗日松弛法[J]. 计算机工程与科学,,2007,29(5)(5):73-76.
APA 张富彬,何庆延,彭思龙,ZHANGFu-bin,HOChing-yen,&PENGSi-long,.(2007).调整门和连线尺寸以减小串扰的拉格朗日松弛法.计算机工程与科学,,29(5)(5),73-76.
MLA 张富彬,et al."调整门和连线尺寸以减小串扰的拉格朗日松弛法".计算机工程与科学, 29(5).5(2007):73-76.
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