CASIA OpenIR  > 国家专用集成电路设计工程技术研究中心
赵旭莹1; 李桓1; 王晓琴2; 王东琳2
Source Publication微电子学与计算机
Abstract为了对无线通信卷积编码多标准支持,同时为了适应未来高速率卷积编码需求,基于滑窗流水的前向回溯基四算法,实现了支持多标准的高性能可配置viterbi译码器,该译码器峰值吞吐可达到1.15Gbps@6144bit,600MHz。与主流商用viterbi译码器相比,全球领先的半导体公司-TI的viterbi译码器VCP2数据处理能力为9.5Mbps@40bit,333MHz,本文中译码器数据处理能力为32.173Mbps@40bit,333MHz,性能提升约3.3倍。 此外,该译码器在面积与功耗方面也优于其它可配置型viterbi译码器,在未来高速率卷积译码中有很大应用前景。
Other AbstractIn order to support multi-standard for convolutional coding in wireless communication, and to meet the requirement of high data rate in the future. A radix-4 multi-standard high performance reconfigurable viterbi decoder based on the sliding window pipeline technique with forward traceback algorithm was implemented. The peak throughput of the decoder can reach up to 1.15Gbps@6144bit,600MHz. Compared with the mainstream commercial viterbi decoder, the data processing speed of VCP2 which is proposed by Texas Instruments company is 9.5Mbps@40bit,333MHz, and the data processing speed of viterbi decoder in this paper is 32.173Mbps@40bit,333MHz, performance improved about 3.3 times. In addition, the decoder is superior to other reconfigurable viterbi decoders in area and power consumption. It has great application prospect in the future high data rate convolutional decoding.
Keyword可配置 Viterbi译码器 高性能 滑窗流水 前向回溯
Document Type期刊论文
Recommended Citation
GB/T 7714
赵旭莹,李桓,王晓琴,等. 基于滑窗流水的高性能可配置viterbi译码器[J]. 微电子学与计算机,2018,35(2):32-36.
APA 赵旭莹,李桓,王晓琴,&王东琳.(2018).基于滑窗流水的高性能可配置viterbi译码器.微电子学与计算机,35(2),32-36.
MLA 赵旭莹,et al."基于滑窗流水的高性能可配置viterbi译码器".微电子学与计算机 35.2(2018):32-36.
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