CASIA OpenIR  > 国家专用集成电路设计工程技术研究中心
A Self-Indexed Register File for Efficient Arithmetical Computing Hardware
Lei Yang; Shaolin Xie; Zijun Liu; Xueliang Du; DongLin Wang
2017-12
Conference NameComputer Science and Electronic Engineering (CEEC), 2017. IEEE
Pages13 - 18
Conference Date2017-10
Conference PlaceUK
AbstractThis paper presents a novel register file with self-indexed features, targeting the DSP/media algorithm with massive data locality. The self-indexed register file (SIRF) contains 128 high-speed registers, 4 input ports and 4 output ports. It can be accessed with the double circular window mode, or simply with the immediate index mode. SIRF can eliminate write after write (WAW) dependence without register renaming in hardware or redundant register allocation in compilers, and it can also reduce the address computation if the accessing pattern satisfies the circular window mode. The SIRF was implemented in a high performance mathematical processor(MaPU). Two detailed application examples, finite impulse response (FIR) filtering and image interpolating, are demonstrated to show how SIRF can accelerate DSP/media algorithms. Evaluation shows that SIRF can dramatically reduce memory access. A 2.88× speed-up and a 20% overall power reduction are observed with the evaluated algorithms.
KeywordRegister File Arithmetical Computing Energy Efficient
Language英语
Document Type会议论文
Identifierhttp://ir.ia.ac.cn/handle/173211/20910
Collection国家专用集成电路设计工程技术研究中心
AffiliationChinese Acad Sci, Inst Automat, 95 Zhongguancun East Rd, Beijing 100190, Peoples R China
First Author AffilicationInstitute of Automation, Chinese Academy of Sciences
Recommended Citation
GB/T 7714
Lei Yang,Shaolin Xie,Zijun Liu,et al. A Self-Indexed Register File for Efficient Arithmetical Computing Hardware[C],2017:13 - 18.
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