CASIA OpenIR  > 国家专用集成电路设计工程技术研究中心
A reconfigurable high-performance multiplier based on multi-granularity design and parallel acceleration
Feng Jing1,2; Zijun Liu2; Xiaojun Ma2; Guo Yang1,2; Guo Peng1,2; Donglin Wang2
2018-04
Conference Name2017 8th IEEE International Conference on Software Engineering and Service Science (ICSESS 2017)
Volume567 - 570
Pages4
Conference Date2017-11
Conference Place中国科技会堂
Abstract
; This paper proposes a reconfigurable high performance multiplier (RHPM) based on multi-granularity design and parallel acceleration. Capable of supporting multiple precisions for different processing requirements, the RHPM can perform one 32x32, two 16x16, or four 8x8bit unsigned/signed multiplication, or one 16x16, or two 8x8bit complex number multiplication. The structures of the partial product generator and the partial product accumulator are improved in the paper, so as to reuse most of the hardware resources. Compression can be completed automatically by means of recording the validity of every bit in the partial product array which accelerates the computation dramatically. The RHPM is implemented with TSMC 28nm technology, exhibiting a 0.68s of the critical path delay, while consuming only 0.6281mW in power. Results show its significant superiority in terms of performance and power efficiency compared with our previous work or other similar products.
KeywordCompression High Speed Multi-granularity Parallel Power Efficient Reuse Reconfigurable
Indexed ByEI
Language英语
Document Type会议论文
Identifierhttp://ir.ia.ac.cn/handle/173211/21010
Collection国家专用集成电路设计工程技术研究中心
Affiliation1.中国科学院大学
2.中国科学院自动化研究所
Recommended Citation
GB/T 7714
Feng Jing,Zijun Liu,Xiaojun Ma,et al. A reconfigurable high-performance multiplier based on multi-granularity design and parallel acceleration[C],2018:4.
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