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纳米级IC设计中的信号完整性问题研究
其他题名Signal Integrity Problem Research in Nanometer IC Design
张富彬
学位类型工学博士
导师彭思龙
2006-06-03
学位授予单位中国科学院研究生院
学位授予地点中国科学院自动化研究所
学位专业计算机应用技术
关键词静态串扰噪声 动态串扰噪声 电感噪声 静态ir压降 动态ir压降 信号完整性 电源完整性 Static Crosstalk Noise Dynamic Crosstalk Noise Inductive Noise Static Ir Drop Dynamic Ir Drop Signal Integrity Power Integrity
摘要信号完整性问题是纳米级IC设计中遇到的最严峻挑战。信号完整性问题研究的领域比较广泛,包括信号线上的信号完整性以及电源网络的电源完整性。信号完整性问题在高抽象层次表现为噪声和延时,这些问题都是由电路层中的电阻、电容和电感导致的。 在信号线上的信号完整性问题方面,论文重点研究了纳米级IC设计中的耦合电容串扰噪声,给出了静态串扰噪声和动态串扰噪声的识别算法。传统的静态串扰噪声识别算法只验证耦合电容和噪声幅值信息,没有考虑噪声宽度对电路逻辑功能的影响,所以给出的结果往往过于保守,导致设计收敛的时间被延长。论文在传统算法的基础上增加了噪声宽度这一识别指标,克服了以往算法结果过于保守的缺点。 在动态串扰目标的识别算法中,针对基于传统静态时序分析的结果过于保守的缺点,论文引入了混合时序分析,缩小了时间窗区间,为动态串扰噪声的识别提供了准确的时序信息。与此同时,通过测试生成来验证信号间的逻辑关系,根据这些准确的时序及逻辑信息,识别出动态串扰噪声。 在串扰的优化中,给出了一个布线后减小串扰噪声的算法。算法通过调整逻辑门和互连线的尺寸,有效地减小了串扰噪声,在减小噪声的同时约束电路的最大延时,使得在串扰噪声和时序都满足约束的条件下最小化芯片面积。算法保证了改变逻辑门和线网尺寸不会破坏电路的时序约束。此算法不需回到布线阶段来优化串扰,减少了设计迭代次数,加快了设计收敛时间。 在电源完整性方面,论文分析了两类主要的电源噪声:静态IR压降和动态IR压降,讨论了电源噪声的产生机制,最后给出了电源噪声的优化方法。 理论分析与实验结果表明,本论文的算法在创新性、精确度、复杂度、适用性等方面有着各自的优势。为纳米级IC设计中遇到的各种新现象、新问题,如纳米级IC设计中的时序收敛、逻辑电平完整性,IC制造过程中的可靠性问题等严峻挑战,作出了有益的探索。
其他摘要Signal integrity is a major bottleneck in nanometer IC designs. Signal integrity refers to wide varity of problems, which include signal integrity in interconnects and power interity. Signal integrity causes delay or noise at the high-level, but this boils down to resistance, capacitance and inductance(RLC)at circuit level. This thesis researches coupling capacitance crosstalk noise in nanometer IC designs, present static crosstalk noise identification algorithm and dynamic crosstalk noise identification algorithm. Traditional static crosstalk identification methods identify crosstalk targets only using coupling capacitance and noise amplitude information, which lead to the pessimistic results and induce a long time to IC design convergence. In the course of our static crosstalk noise identification, the noise width along with coupling capacitance and noise amplitude are used to identify static crosstalk noise targets, which overcomes the conservative defect of previous methods. In the course of dynamic crosstalk noise identification, hybrid timing analysis is used to provide accurate signal arrival time, which can provide more accurate timing information than static timing analysis. At the same time, a novel test generation is chosen to verify the correlation of signals, so dynamic crosstalk noise can be identified by these accurate timing and logic information. In the course of crosstalk reduction, this paper presents a post-route, crosstalk reduction algorithm by gate and wire sizing. At the same time, it constrains the worst delay of circuit to guarantee circuit performance. This algorithm can minimize total area of circuit subject to worst delay and maximum crosstalk bound, and then it does not lead to timing violation when performing gate and wire sizing. Experimental results demonstrate the effectiveness of the algorithm. What is more, it need not come back to routing phase to reduce crosstalk, so it reduces design iterative number and accelerates the convergence of design. This thesis analyzes power integrity, including static IR drop and dynamic IR drop. What is more, the causes of power noise are discussed and a set of noise reduction methods are presented. Theory analysis and experiment results indicate that the algorithms proposed in this thesis have respective advantages, such as innovation, accuracy, simplicity, applicability, etc. This thesis explores an instructive way to deal with all kinds of signal integrity problems in nanometer IC designs and manufacture.
馆藏号XWLW1012
其他标识符200318014603043
语种中文
文献类型学位论文
条目标识符http://ir.ia.ac.cn/handle/173211/5933
专题毕业生_博士学位论文
推荐引用方式
GB/T 7714
张富彬. 纳米级IC设计中的信号完整性问题研究[D]. 中国科学院自动化研究所. 中国科学院研究生院,2006.
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