CASIA OpenIR  > 毕业生  > 博士学位论文
SOPC处理器的程序压缩与解压研究
其他题名Research on Code Compression and Decoder for Processors in SOPC
涂吉
学位类型工学博士
导师李立健
2015-05-25
学位授予单位中国科学院大学
学位授予地点中国科学院自动化研究所
学位专业计算机应用技术
关键词星载处理机 代码压缩 存储系统 多字典 可编程片上系统 On-board Computer Code Compression Memory System Multi-dictionary System-on-a-programmable-chip
摘要随着应用复杂度的增加,软件程序对存储空间的需求也逐步增大。由于星载处理机的存储器容量在物理上的增加往往受到机器自身、系统成本及功耗等的制约,因此将程序代码进行压缩存储,以从逻辑上来扩充存储器的容量,提高存储器的带宽。本文结合星载处理机主控制器SOPC的设计,采用程序代码压缩存储解决方案,提出了两种新的代码压缩方法,并将代码解码逻辑成功地在FPGA中实现。本文的研究工作主要在以下三个方面展开: (1)对存储压缩系统的理论研究 研究了存储压缩系统的层次结构设计以及cache的设计和优化,分析了影响系统性能的因素和评估处理器性能和存储器性能的方法。详细定义了码源符号、压缩后代码符号等概念,分析了代码熵、代码联合熵、代码条件熵以及代码信息的相关性和码源剩余度的性质及计算方法。建立了六种程序代码的数学建模模型,分别为:域模型、指令类型模型、执行宏模型、分块模型、概率模型以及混合模型。对目前论文中、工程中出现的各种代码压缩方法进行了归类,并可根据对所建立的代码模型进行组合变换,设计出新的代码压缩方法。 (2)程序代码压缩存储方法的研究 提出了基于多字典的代码压缩存储方法和聚类分块的代码压缩存储方法。多字典的代码压缩存储方法,根据指令集合中不同编码出现的频次,对指令集合进行分类,并对各类编码集合采用不同索引长度的字典进行压缩。理论证明和实验结果表明,本方法的效果优于采用传统的字典压缩的压缩率。对MiBench基准程序在ARM和MIPS指令集下编译的指令采用本方法进行压缩,压缩率分别在50%∼55%, 65%∼71%之间。聚类分块的代码压缩存储方法,充分利用源代码符号以块的形式连续出现的特点,将这些代码聚为m 类,然后再根据源代码符号的整体概率分布,将源代码符号分为n 类,最后采用基于多字典的编码方法进行压缩,MiBench基准程序在ARM和MIPS指令集下编译的指令的压缩率有了进一步提高,分别在43%∼44%, 62%∼70% 之间。实验结果表明,这两种代码压缩方法的压缩效果都非常显著,且解压逻辑简单、易于实现。 (3)程序压缩存储技术在SOPC中的应用和实现 研究了指令解码器实现的三个关键问题:符号快速定位、地址映射和访存时间的减少。通过并行的查找多字典,实现符号的快速定位,同时增大了存储带宽。通过地址映射表来解决程序压缩前后指令的地址变动问题,使得程序在压缩后,仍能正确找到跳转指令的实际地址。通过地址映射缓冲存储器来减少访存次数,从而降低cache失效时的时间开销。设计了用于星载遥感影像处理系统的SOPC控制器。采用代码压缩方案,提高了存储器的带宽、增强了MPU16-RISC处理器的性能。对NandFlash中的DSP程序也进行压缩存储,通过FPGA中的MPU16-CPU进行解压并传送给DSP的link口。
其他摘要The demand of program storage space is increasing as the applications become more and more complex. It is usually hard to improve the on-board computer storage capacity due to the high cost and power consumption of the board itself and other relevant systems. The program is compressed to relaxing the problem and then stored in memory, which enhances the logic capacity of the memory and enlarge the memory bandwidth. This thesis introduces a code compression scheme in SOPC design for a processor of on-board computer. Concretely, two strategies of code compression are presented and implemented in FPGA. The main body of our research can be summarized into the following three pieces of work: 1) Research on the storage compression system In this part, the cache design and optimization methods are first discussed by analyzing the hierarchy of storage compression system. The calculation methods of CPU time and the average memory access time are given in this thesis. Then the factors that influence the system performance are analyzed. The methods for evaluating the performances of both CPU and memory access are also assessed. Some new concepts such as distinct code symbols, compressed code symbols and so on have been defined. The code entropy, code joint entropy and condition entropy are proposed. The calculation methods of code message correlation and code source redundancy are introduced. Six mathematical models of the program code symbols are given. They are the domain model, the types of instruction model, performs macro model, code block model, the probability model and hybrid model. Various code compression methods are based on these six models. 2) Research on code compression methods Multi-dictionary based code compression method and the clustered block based code compression method are proposed in this part. According to the frequency disparity of different instructions in the program, the multi-dictionary based code compression method is presented. The method use different dictionaries to encode the instructions. Since the index length of each dictionary is different, the more frequently occurring instructions can be encoded into fewer bits. Theoretical proof and experimental results show that the proposed method is superior to the traditional dictionary compression methods. The compression ratio of MiBench benchmark compiled under the ARM and MIPS instruction sets are between 50%∼52% and 65%∼71% respectively by using multi-dictionary ...
其他标识符201118014629089
语种中文
文献类型学位论文
条目标识符http://ir.ia.ac.cn/handle/173211/6678
专题毕业生_博士学位论文
推荐引用方式
GB/T 7714
涂吉. SOPC处理器的程序压缩与解压研究[D]. 中国科学院自动化研究所. 中国科学院大学,2015.
条目包含的文件
文件名称/大小 文献类型 版本类型 开放类型 使用许可
CASIA_20111801462908(4043KB) 暂不开放CC BY-NC-SA请求全文
个性服务
推荐该条目
保存到收藏夹
查看访问统计
导出为Endnote文件
谷歌学术
谷歌学术中相似的文章
[涂吉]的文章
百度学术
百度学术中相似的文章
[涂吉]的文章
必应学术
必应学术中相似的文章
[涂吉]的文章
相关权益政策
暂无数据
收藏/分享
所有评论 (0)
暂无评论
 

除非特别说明,本系统中所有内容都受版权保护,并保留所有权利。