CASIA OpenIR  > 09年以前成果
Leakage current estimation of CMOS circuit with stack effect
Xu, YJ; Luo, ZY; Li, XW; Li, LJ; Hong, XL
AbstractLeakage current of CMOS circuit increases dramatically with the technology scaling down and has become a critical issue of high performance system. Subthreshold, gate and reverse biased junction band-to-band tunneling (BTBT) leakages are considered three main determinants of total leakage current. Up to now, how to accurately estimate leakage current of large-scale circuits within endurable time remains unsolved, even though accurate leakage models have been widely discussed. In this paper, the authors first dip into the stack effect of CMOS technology and propose a new simple gate-level leakage current model. Then, a table-lookup based total leakage current simulator is built up according to the model. To validate the simulator, accurate leakage current is simulated at circuit level using popular simulator HSPICE for comparison. Some further studies such as maximum leakage current estimation, minimum leakage current generation and a high-level average leakage current macromodel are introduced in detail. Experiments on ISCAS85 and ISCAS89 benchmarks demonstrate that the two proposed leakage current estimation methods are very accurate and efficient.
KeywordComputer-aided Design Leakage Current Estimation Stack Effect Macromodeling Propagation Of Signal Probability
WOS HeadingsScience & Technology ; Technology
Indexed BySCI
WOS Research AreaComputer Science
WOS SubjectComputer Science, Hardware & Architecture ; Computer Science, Software Engineering
WOS IDWOS:000224137200017
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Cited Times:3[WOS]   [WOS Record]     [Related Records in WOS]
Document Type期刊论文
Affiliation1.Chinese Acad Sci, Inst Comp Technol, Beijing 100080, Peoples R China
2.Chinese Acad Sci, Grad Sch, Beijing 100039, Peoples R China
3.Tsing Hua Univ, Dept Comp Sci & Technol, Beijing 100084, Peoples R China
4.Chinese Acad Sci, Inst Automat, Natl ASIC Design Engn Ctr, Beijing 100080, Peoples R China
Recommended Citation
GB/T 7714
Xu, YJ,Luo, ZY,Li, XW,et al. Leakage current estimation of CMOS circuit with stack effect[J]. JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,2004,19(5):708-717.
APA Xu, YJ,Luo, ZY,Li, XW,Li, LJ,&Hong, XL.(2004).Leakage current estimation of CMOS circuit with stack effect.JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY,19(5),708-717.
MLA Xu, YJ,et al."Leakage current estimation of CMOS circuit with stack effect".JOURNAL OF COMPUTER SCIENCE AND TECHNOLOGY 19.5(2004):708-717.
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