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| A reconfigurable computing architecture for 5G communication 期刊论文 Journal of Central South University, 2019, 期号: 0, 页码: 0 作者: GUO Yang; LIU Zi-Jun; YANG Lei; LI Huan; WANG Dong-Lin 浏览  |  Adobe PDF(913Kb)  |  收藏  |  浏览/下载:433/129  |  提交时间:2019/07/11 5g Instruction Set Register File Code Compression Throughput Power Consumption. |
| A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network 期刊论文 Journal of Circuits, Systems, and Computers, 2019, 卷号: 28, 期号: 1, 页码: 1 作者: Guo Peng; Ma Hong; Ruizhi Chen; Donglin Wang Adobe PDF(1487Kb)  |  收藏  |  浏览/下载:305/134  |  提交时间:2019/06/17 Cnn Bnn Fpga Accelerator |
| Accelerate Convolutional Neural Network with a customized VLIW DSP 会议论文 , 北京, 2018-10 作者: Guo Peng; Ma Hong; Guo Ruoshan; Liu Zhuang; Li Pin; Wang Donglin 浏览  |  Adobe PDF(1173Kb)  |  收藏  |  浏览/下载:319/121  |  提交时间:2019/06/17 |
| FBNA: A Fully Binarized Neural Network Accelerator 会议论文 , 爱尔兰都柏林, 2018-8 作者: Guo Peng; Hong Ma; Ruizhi Chen; Pin Li; Shaolin Xie; Donglin Wang 浏览  |  Adobe PDF(824Kb)  |  收藏  |  浏览/下载:366/139  |  提交时间:2019/06/17 |
| A Self-Indexed Register File for Efficient Arithmetical Computing Hardware 会议论文 , UK, 2017-10 作者: Lei Yang; Shaolin Xie; Zijun Liu; Xueliang Du; DongLin Wang Adobe PDF(707Kb)  |  收藏  |  浏览/下载:301/70  |  提交时间:2018/05/07 Register File Arithmetical Computing Energy Efficient |
| An approach to build cycle accurate full system VLIW simulation platform 期刊论文 SIMULATION MODELLING PRACTICE AND THEORY, 2016, 卷号: 67, 期号: 2016, 页码: 14-28 作者: Yang, Lei; Wang, Lei; Zhang, Xing; Wang, DongLin 浏览  |  Adobe PDF(2567Kb)  |  收藏  |  浏览/下载:378/130  |  提交时间:2016/12/26 Vliw Simulation Cycle Accurate Heterogeneous Computing |
| MaPU: A Novel Mathematical Computing Architecture 会议论文 http://hpca22.site.ac.upc.edu, Barcelona, Spain, March 12-16 2016 作者: Donglin Wang; Shaolin Xie; Zhiwei Zhang; Xueliang Du; Lei Wang; Zijun Liu; shaolin.xie@ia.ac.cn Adobe PDF(2051Kb)  |  收藏  |  浏览/下载:723/183  |  提交时间:2016/04/07 Computer Architecture Vlsi High Performance Computing |