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A reconfigurable computing architecture for 5G communication 期刊论文
Journal of Central South University, 2019, 期号: 0, 页码: 0
作者:  GUO Yang;  LIU Zi-Jun;  YANG Lei;  LI Huan;  WANG Dong-Lin
浏览  |  Adobe PDF(913Kb)  |  收藏  |  浏览/下载：421/128  |  提交时间：2019/07/11
5g  Instruction Set  Register File  Code Compression  Throughput  Power Consumption.  
A High-Efficiency FPGA-Based Accelerator for Binarized Neural Network 期刊论文
Journal of Circuits, Systems, and Computers, 2019, 卷号: 28, 期号: 1, 页码: 1
作者:  Guo Peng;  Ma Hong;  Ruizhi Chen;  Donglin Wang
浏览  |  Adobe PDF(1487Kb)  |  收藏  |  浏览/下载：303/134  |  提交时间：2019/06/17
Cnn  Bnn  Fpga  Accelerator  
A bypass-based low latency network-on-chip router 期刊论文
IEICE ELECTRONICS EXPRESS, 2019, 卷号: 16, 期号: 4, 页码: 12
作者:  Guo, Peng;  Liu, Qingbin;  Chen, Ruizhi;  Yang, Lei;  Wang, Donglin
收藏  |  浏览/下载：258/0  |  提交时间：2019/04/23
network-on-chip  router  bypass  low latency  
A Bypass-Based Low Latency Network-on-Chip Router 期刊论文
IEICE Electronics Express, 2019, 卷号: 16, 期号: 4, 页码: 1
作者:  Guo Peng;  Qingbin Liu;  Ruizhi Chen;  Lei Yang;  Donglin Wang
浏览  |  Adobe PDF(1881Kb)  |  收藏  |  浏览/下载：266/91  |  提交时间：2019/06/17
Network-on-chip  Router  Bypass  Low Latency  
A high-throughput network on-chip in full-mesh architecture 期刊论文
IEICE ELEX, 2018, 卷号: 15, 期号: 17, 页码: 1-12
作者:  Hongyu,Meng;  Lei,Yang;  Zijun.Liu;  Donglin.Wang
浏览  |  Adobe PDF(2525Kb)  |  收藏  |  浏览/下载：277/102  |  提交时间：2019/05/06
Network On-chip  Full-mesh  High Connectivity  Multi-core  
Progress in a novel architecture for high performance processing 期刊论文
JAPANESE JOURNAL OF APPLIED PHYSICS, 2018, 卷号: 57, 期号: 4
作者:  Zhang, Zhiwei;  Liu, Meng;  Liu, Zijun;  Du, Xueliang;  Xie, Shaolin;  Ma, Hong;  Ding, Guangxin;  Ren, Weili;  Zhou, Fabiao;  Sun, Wenqin;  Wang, Huijuan;  Wang, Donglin
收藏  |  浏览/下载：284/0  |  提交时间：2018/10/10
A novel obstacle-aware multiple fan-out symmetrical clock tree synthesis 期刊论文
IEICE ELECTRONICS EXPRESS, 2017, 卷号: 14, 期号: 20
作者:  Liu, Meng;  Zhang, Zhiwei;  Sun, Wenqin;  Wang, Donglin
收藏  |  浏览/下载：204/0  |  提交时间：2018/10/10
Symmetrical Clock Tree  Multiple Fan-out  Matching Algorithm  Buffer Insertion  Obstacle-aware Placement And Routing  
An approach to build cycle accurate full system VLIW simulation platform 期刊论文
SIMULATION MODELLING PRACTICE AND THEORY, 2016, 卷号: 67, 期号: 2016, 页码: 14-28
作者:  Yang, Lei;  Wang, Lei;  Zhang, Xing;  Wang, DongLin
浏览  |  Adobe PDF(2567Kb)  |  收藏  |  浏览/下载：372/130  |  提交时间：2016/12/26
Vliw Simulation  Cycle Accurate  Heterogeneous Computing  
Collection of charge in NMOS from single event effect 期刊论文
IEICE ELECTRONICS EXPRESS, 2016, 卷号: 13, 期号: 8, 页码: 1-8
作者:  Wang, Jingqiu;  Lin, Fujiang;  Wang, Donglin;  Song, Wenna;  Liu, Li;  Song, Qiwei;  Chen, Liang
Adobe PDF(2518Kb)  |  收藏  |  浏览/下载：275/59  |  提交时间：2016/09/30
Single Event Effect  Ultra Deep Sub-micron  Double Exponential Transient Current Model  Multi-dimensional  
Including the Effects of Process-Related Variability on Radiation Response in Advanced Foundry Process Design Kits 期刊论文
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2010, 卷号: 57, 期号: 6, 页码: 3570-3574
作者:  Li, Yanfeng;  Rezzak, Nadia;  Zhang, En Xia;  Schrimpf, Ronald D.;  Fleetwood, Daniel M.;  Wang, Jingqiu;  Wang, Donglin;  Wu, Yanjun;  Cai, Shuang
浏览  |  Adobe PDF(415Kb)  |  收藏  |  浏览/下载：297/81  |  提交时间：2015/11/08
Mismatch  Process Design Kit  Process Variability  Radiation Effects  Stress  Tid