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A bypass-based low latency network-on-chip router 期刊论文
IEICE ELECTRONICS EXPRESS, 2019, 卷号: 16, 期号: 4, 页码: 12
Authors:  Guo, Peng;  Liu, Qingbin;  Chen, Ruizhi;  Yang, Lei;  Wang, Donglin
Favorite  |  View/Download:28/0  |  Submit date:2019/04/23
network-on-chip  router  bypass  low latency  
A Bypass-Based Low Latency Network-on-Chip Router 期刊论文
IEICE Electronics Express, 2019, 卷号: 16, 期号: 4, 页码: 1
Authors:  Guo Peng;  Qingbin Liu;  Ruizhi Chen;  Lei Yang;  Donglin Wang
View  |  Adobe PDF(1881Kb)  |  Favorite  |  View/Download:27/13  |  Submit date:2019/06/17
Network-on-chip  Router  Bypass  Low Latency  
90 degrees and 180 degrees phase shifter using an arbitrary phase-difference coupled-line structure 期刊论文
IEICE ELECTRONICS EXPRESS, 2017, 卷号: 14, 期号: 22
Authors:  Dong, Yezi;  Mao, Luhong;  Song, Qiwei;  Xie, Sheng
Favorite  |  View/Download:28/0  |  Submit date:2018/10/10
Arbitrary Phase-difference  Coupled-line  Phase Shifter  
A novel obstacle-aware multiple fan-out symmetrical clock tree synthesis 期刊论文
IEICE ELECTRONICS EXPRESS, 2017, 卷号: 14, 期号: 20
Authors:  Liu, Meng;  Zhang, Zhiwei;  Sun, Wenqin;  Wang, Donglin
Favorite  |  View/Download:49/0  |  Submit date:2018/10/10
Symmetrical Clock Tree  Multiple Fan-out  Matching Algorithm  Buffer Insertion  Obstacle-aware Placement And Routing  
Collection of charge in NMOS from single event effect 期刊论文
IEICE ELECTRONICS EXPRESS, 2016, 卷号: 13, 期号: 8, 页码: 1-8
Authors:  Wang, Jingqiu;  Lin, Fujiang;  Wang, Donglin;  Song, Wenna;  Liu, Li;  Song, Qiwei;  Chen, Liang
Adobe PDF(2518Kb)  |  Favorite  |  View/Download:78/13  |  Submit date:2016/09/30
Single Event Effect  Ultra Deep Sub-micron  Double Exponential Transient Current Model  Multi-dimensional