Browse/Search Results:  1-3 of 3 Help

Selected(0)Clear Items/Page:    Sort:
Path Delay Test generation Toward Activation of worst Case Coupling Effects 期刊论文
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2011, 卷号: 19, 期号: 11, 页码: 1969-1982
Authors:  minjin, zhang;  Huawei, Li;  Xiaowei,Li
View  |  Adobe PDF(345Kb)  |  Favorite  |  View/Download:22/3  |  Submit date:2017/09/19
Crosstalk-induced Delay  Delay Testing  Path Delay Fault  Signal Integrity  Test Generation  Timing Analysis  
超大规模集成电路的聚类与划分算法 学位论文
, 中国科学院自动化研究所: 中国科学院研究生院, 2009
Authors:  蒿杰
Microsoft Word(5155Kb)  |  Favorite  |  View/Download:22/0  |  Submit date:2015/09/02
层次化聚类  多级划分  时序分析  功耗分析  独立线长预测  Hierarchical Clustering  Multilevel Partitioning  Timing Analysis  Power Analysis  Individual Wirelength Precdition  
Static timing analysis and its application in IC design 期刊论文
Chinese Journal of Electron Devices, 2006, 卷号: 29(4), 期号: 2006年04期, 页码: pp 1329-1333 (EI)
Authors:  Zhang, Fu-Bin;  Ho, Ching-Yen;  Peng, Si-Long,
Favorite  |  View/Download:8/0  |  Submit date:2017/01/13
Static Timing Analysis / sensitize Path / false Path / d-algorithm