A Design Space Exploration Method for on-Chip Memory System Based on Task Scheduling | |
Hongyu,Meng1,2; Pengfei.Ding3; Mingxuan.Wang3; Donglin.Wang1 | |
2018-11 | |
会议名称 | 2018 9th IEEE International Conference on Software Engineering and Service Science |
会议日期 | 2018,11.23-25 |
会议地点 | Beijing,China |
摘要 | As technology scales in the past sixty years, System on-Chip(SoC) has become the inevitable direction of chip development. Multi-core processor as one of the SoCs is the most effective solution to balance the performance and power. However, the bandwidth of chip system has become the bottleneck for multi-core processor. Improving the bandwidth of off-chip memory system or introducing a well-designed on-chip memory system can solve this issue relatively. In this paper, we introduce a design space exploration method based on task scheduling to guide the design of on-chip memory system. Using this method, the utilization of cores can reach a high level under the benchmark of DGEMM and some hardware constraints. In addition, we conclude some relationships for the parameters of the multi-core architecture, which can instruct us how to design appropriate on-chip memory system. |
关键词 | Design Space Exploration Multi-core Architecture Memory System Task Scheduling |
收录类别 | EI |
语种 | 英语 |
文献类型 | 会议论文 |
条目标识符 | http://ir.ia.ac.cn/handle/173211/23630 |
专题 | 国家专用集成电路设计工程技术研究中心 |
通讯作者 | Hongyu,Meng |
作者单位 | 1.Institute of Automation Chinese Academy of Sciences 2.Beijing LogicSmart Technology 3.University of Chinese Academy of Sciences |
第一作者单位 | 中国科学院自动化研究所 |
通讯作者单位 | 中国科学院自动化研究所 |
推荐引用方式 GB/T 7714 | Hongyu,Meng,Pengfei.Ding,Mingxuan.Wang,et al. A Design Space Exploration Method for on-Chip Memory System Based on Task Scheduling[C],2018. |
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文件名称/大小 | 文献类型 | 版本类型 | 开放类型 | 使用许可 | ||
A Design Space Explo(288KB) | 会议论文 | 开放获取 | CC BY-NC-SA | 浏览 下载 |
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