Static timing analysis and its application in IC design

	Static timing analysis and its application in IC design
	Zhang, Fu-Bin; Ho, Ching-Yen; Peng, Si-Long,
发表期刊	Chinese Journal of Electron Devices
	2006
卷号	29(4)期号:2006年04期页码:pp 1329-1333 (EI)
摘要	This paper addresses static timing analysis and its application in integrate circuits design.Firstly,false paths in static timing analysis and the algorithm to sensitize paths are presented,and then some factors affecting gates and interconnects delay are discussed.Finally,a whole integrate circuits design flow is introduced to emphasize the application of static timing analysis.
关键词	Static Timing Analysis / sensitize Path / false Path / d-algorithm
文献类型	期刊论文
条目标识符	http://ir.ia.ac.cn/handle/173211/12983
专题	智能制造技术与系统研究中心_多维数据分析（彭思龙）-技术团队
通讯作者	Zhang, Fu-Bin
推荐引用方式 GB/T 7714	Zhang, Fu-Bin,Ho, Ching-Yen,Peng, Si-Long,. Static timing analysis and its application in IC design[J]. Chinese Journal of Electron Devices,2006,29(4)(2006年04期):pp 1329-1333 (EI).
APA	Zhang, Fu-Bin,Ho, Ching-Yen,&Peng, Si-Long,.(2006).Static timing analysis and its application in IC design.Chinese Journal of Electron Devices,29(4)(2006年04期),pp 1329-1333 (EI).
MLA	Zhang, Fu-Bin,et al."Static timing analysis and its application in IC design".Chinese Journal of Electron Devices 29(4).2006年04期(2006):pp 1329-1333 (EI).