A reconfigurable ASIC-like image polyphase interpolation implementation method | |
Lei Yang; Ruoshan Guo; Shaolin Xie; Donglin Wang | |
2017-11 | |
会议名称 | Electronics Information and Emergency Communication (ICEIEC), 2017 7th IEEE International Conference on |
页码 | 481 - 484 |
会议日期 | 2017-7 |
会议地点 | ShenZhen |
摘要 | This paper presents a reconfigurable application specific integrated circuit (ASIC) like image interpolation implementation method. Parallel data flow and pipeline structure are used and optimized for efficient hardware acceleration. The coefficients could be easily reconfigured to support multiple interpolation filter taps and image resolution. We implement this method on a reconfigurable mathematical processing unit (MaPU). Experiment shows good computing performance and flexibility. With parallel acceleration and flexible configuration support, the implement method would be quite helpful for effective ASIC-like image processing hardware design. |
关键词 | Image Interpolation Acceleration Reconfigurable Implementation |
语种 | 英语 |
文献类型 | 会议论文 |
条目标识符 | http://ir.ia.ac.cn/handle/173211/20909 |
专题 | 国家专用集成电路设计工程技术研究中心 |
作者单位 | Chinese Acad Sci, Inst Automat, 95 Zhongguancun East Rd, Beijing 100190, Peoples R China |
第一作者单位 | 中国科学院自动化研究所 |
推荐引用方式 GB/T 7714 | Lei Yang,Ruoshan Guo,Shaolin Xie,et al. A reconfigurable ASIC-like image polyphase interpolation implementation method[C],2017:481 - 484. |
条目包含的文件 | ||||||
文件名称/大小 | 文献类型 | 版本类型 | 开放类型 | 使用许可 | ||
A reconfigurable ASI(210KB) | 会议论文 | 开放获取 | CC BY-NC-SA | 浏览 下载 |
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