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A reconfigurable ASIC-like image polyphase interpolation implementation method
Lei Yang; Ruoshan Guo; Shaolin Xie; Donglin Wang
2017-11
Conference NameElectronics Information and Emergency Communication (ICEIEC), 2017 7th IEEE International Conference on
Pages481 - 484
Conference Date2017-7
Conference PlaceShenZhen
AbstractThis paper presents a reconfigurable application specific integrated circuit (ASIC) like image interpolation implementation method. Parallel data flow and pipeline structure are used and optimized for efficient hardware acceleration. The coefficients could be easily reconfigured to support multiple interpolation filter taps and image resolution. We implement this method on a reconfigurable mathematical processing unit (MaPU). Experiment shows good computing performance and flexibility. With parallel acceleration and flexible configuration support, the implement method would be quite helpful for effective ASIC-like image processing hardware design.
KeywordImage Interpolation Acceleration Reconfigurable Implementation
Language英语
Document Type会议论文
Identifierhttp://ir.ia.ac.cn/handle/173211/20909
Collection国家专用集成电路设计工程技术研究中心
AffiliationChinese Acad Sci, Inst Automat, 95 Zhongguancun East Rd, Beijing 100190, Peoples R China
Recommended Citation
GB/T 7714
Lei Yang,Ruoshan Guo,Shaolin Xie,et al. A reconfigurable ASIC-like image polyphase interpolation implementation method[C],2017:481 - 484.
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