Traffic-Aware and Memory-Aware Task Scheduling on Multi-Core Chips
Hongyu,Meng1,2; Yang,Guo1; Zijun.Liu1; Donglin.Wang1
2018-11
会议名称2018 9th IEEE International Conference on Software Engineering and Service Science
会议日期2018,11.23-25
会议地点Beijing,China
摘要

With the development of semiconductor industry and integrated circuits, the performance of processors has been advanced steadily. More and more devices including cores, memories and peripherals are being integrated in chips to meet the requirements of high performance applications. The rapid increase in chip complexity makes it difficult for these devices to work efficiently. In order to facilitate efficient chips systems, we proposed a task scheduling algorithm for Chip Multi-Processors(CMP) which are called Homogeneous Earliest-Finish-Time(HoEFT) algorithm. We use this algorithm to finish two benchmarks on a chip system consisting of eight Processing Elements(PEs) and a 16MB shared memory. The results show that these PEs can reach reasonable utilization under HoEFT algorithm.

关键词Task Scheduling Multi-core Shared Memory Traffic-aware Memory-aware
收录类别EI
语种英语
文献类型会议论文
条目标识符http://ir.ia.ac.cn/handle/173211/23628
专题国家专用集成电路设计工程技术研究中心
通讯作者Hongyu,Meng
作者单位1.Institute of Automation Chinese Academy of Sciences
2.University of Chinese Academy of Sciences
第一作者单位中国科学院自动化研究所
通讯作者单位中国科学院自动化研究所
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GB/T 7714
Hongyu,Meng,Yang,Guo,Zijun.Liu,et al. Traffic-Aware and Memory-Aware Task Scheduling on Multi-Core Chips[C],2018.
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