Parallel LDPC Decoder Based on Low-Complexity Corrected Min Sum Algorithm
Sun, Yisong1,2; Li, Huan2; Zhang, Xinyu3; Guo, Chen2; Liu, Zijun2; Wang, Donglin2
2022
会议名称2022 4th International Conference on Advances in Computer Technology, Information Science and Communications
会议日期2022-4-23
会议地点Suzhou, China
摘要

To correct the errors introduced by the approximation in the Min Sum (MS) algorithm with low complexity, we proposed Low-Complexity Corrected Min Sum (LCC-MS) algorithm. Aiming at the implementation bottleneck of the algorithm on the self-developed DSP (Universal Communication Processor, UCP), we optimized the algorithm process and expanded the instruction set of UCP. Therefore, the LDPC decoder based on LCC-MS algorithm is implemented on UCP, and verified on the chip that has been taped out. The verification results of the longest code length and the highest code rate show that the LCC-MS algorithm has a gain of 0.16dB when the bit error rate is 10-5 compared with the MS algorithm, and the decoder based on LCC-MS algorithm can process up to 149 code blocks in one time slot.

关键词5G LDPC decoder LCC-MS UCP
语种英语
文献类型会议论文
条目标识符http://ir.ia.ac.cn/handle/173211/48581
专题国家专用集成电路设计工程技术研究中心_先进微处理器
作者单位1.University of Chinese Academy of Sciences
2.Institute of Automation, Chinese Academy of Sciences
3.Beijing Smart Logic East Technology Co., Ltd.
第一作者单位中国科学院自动化研究所
推荐引用方式
GB/T 7714
Sun, Yisong,Li, Huan,Zhang, Xinyu,et al. Parallel LDPC Decoder Based on Low-Complexity Corrected Min Sum Algorithm[C],2022.
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