中国科学院自动化研究所机构知识库

 Canny edge detection is widely used in image processing. Conventional Canny edge detection is commonly realizedin CPUs, GPUs or FPGA fabrics alone. but CPUs and GPUs are not suitable for low-power applications. And existing edgedetection implementations on specific FpGA model have little compatibility with other models. In this paper, we propose aneffective Canny edge detection system consist of FPGA and ARM-SoC. ARM core is embedded with Yocto Linux Os, andFPGA is in charge of image processing and VG;A display. FPGA IP cores are desiened to communicate through Avalon-STBridge. In the end, the system has been implemented and tested with a quantity of images. The testing results show the eficiencyof the proposed system design scheme and the system can be based on to achieve more complex algorithm.