CASIA OpenIR
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A Distributed Register File Architecture Based on Dynamic Scheduling for VLIW Machine 会议论文
, 北京, 2018-6
作者:  Yang Guo;  Donglin Wang;  Zijun Liu;  Hongyu Meng
浏览  |  Adobe PDF(203Kb)  |  收藏  |  浏览/下载:340/133  |  提交时间:2019/05/10
A Design Space Exploration Method for on-Chip Memory System Based on Task Scheduling 会议论文
, Beijing,China, 2018,11.23-25
作者:  Hongyu,Meng;  Pengfei.Ding;  Mingxuan.Wang;  Donglin.Wang
浏览  |  Adobe PDF(288Kb)  |  收藏  |  浏览/下载:312/109  |  提交时间:2019/05/06
Design Space Exploration  Multi-core Architecture  Memory System  Task Scheduling  
Traffic-Aware and Memory-Aware Task Scheduling on Multi-Core Chips 会议论文
, Beijing,China, 2018,11.23-25
作者:  Hongyu,Meng;  Yang,Guo;  Zijun.Liu;  Donglin.Wang
Adobe PDF(345Kb)  |  收藏  |  浏览/下载:327/105  |  提交时间:2019/05/06
Task Scheduling  Multi-core  Shared Memory  Traffic-aware  Memory-aware