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Efficient Accelerator/Network Co-Search with Circular Greedy Reinforcement Learning 期刊论文
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS, 2023, 页码: 1-5
作者:  Liu, Zejian;  Li, Gang;  Cheng, Jian
Adobe PDF(1982Kb)  |  收藏  |  浏览/下载：104/32  |  提交时间：2023/06/19
Accelerator/Network Co-Search  Reinforcement Learning  Performance Estimation  Multi-objective Optimization  
Block Convolution: Toward Memory-Efficient Inference of Large-Scale CNNs on FPGA 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 卷号: 41, 期号: 5, 页码: 1436-1447
作者:  Li, Gang;  Liu, Zejian;  Li, Fanrong;  Cheng, Jian
Adobe PDF(4046Kb)  |  收藏  |  浏览/下载：247/22  |  提交时间：2022/06/10
Convolution  Field programmable gate arrays  System-on-chip  Task analysis  Random access memory  Tensors  Memory management  Block convolution  convolutional neural network (CNN) accelerator  field-programmable gate array (FPGA)  memory efficient  off-chip transfer  
Extremely Sparse Networks via Binary Augmented Pruning for Fast Image Classification 期刊论文
IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS, 2021, 页码: 14
作者:  Wang, Peisong;  Li, Fanrong;  Li, Gang;  Cheng, Jian
收藏  |  浏览/下载：180/0  |  提交时间：2022/01/27
Hardware acceleration  image classification  neural networks  pruning  software-hardware codesign  
Block Convolution: Towards Memory-Efficient Inference of Large-Scale CNNs on FPGA 期刊论文
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021, 期号: 2021.5, 页码: 1-1
作者:  Li, Gang;  Liu, Zejian;  Li, Fanrong;  Cheng, Jian
Adobe PDF(6174Kb)  |  收藏  |  浏览/下载：173/34  |  提交时间：2022/02/15
block convolution  memory-efficient  off-chip transfer  fpga  cnn accelerator  
FSA: A Fine-Grained Systolic Accelerator for Sparse CNNs 期刊论文
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2020, 卷号: 39, 期号: 11, 页码: 3589-3600
作者:  Li, Fanrong;  Li, Gang;  Mo, Zitao;  He, Xiangyu;  Cheng, Jian
Adobe PDF(1906Kb)  |  收藏  |  浏览/下载：320/57  |  提交时间：2021/01/06
Accelerator  architecture  convolutional neural networks (CNNs)  sparsity  
A Hardware Descriptive Approach to Beetle Antennae Search 期刊论文
IEEE ACCESS, 2020, 卷号: 8, 页码: 89059-89070
作者:  Yue, Zongcheng;  Li, Gang;  Jiang, Xiangyuan;  Li, Shuai;  Cheng, Jian;  Ren, Peng
收藏  |  浏览/下载：138/0  |  提交时间：2020/07/20
Field programmable gate arrays  Hardware design languages  Optimization  Directive antennas  Genetic algorithms  Hardware  FPGA  beetle antennae search  Verilog HDL  optimization algorithm